VHDL is a hardware description language. The word 'hardware', however, is used in a wide variety of contexts which range from complete systems like personal computers on one side to the small logical gates on their internal integrated circuits on the other side.
This is why different descriptions exist for the hardware functionality. Complex systems are often described by the behaviour that is observable from the outside. Abstract behavioural models are used in this case that hide all the implementation details. In this example the print protocol will be executed whenever a PRINTREQUEST occurs. This can be either a pressed key or a software command, etc. The description of a basic logic gate, on the other hand, may consist of only one boolean equation. This is a very short and precise description.
The language VHDL covers the complete range of applications and can be used to model (digital) hardware in a general way.
This is why different descriptions exist for the hardware functionality. Complex systems are often described by the behaviour that is observable from the outside. Abstract behavioural models are used in this case that hide all the implementation details. In this example the print protocol will be executed whenever a PRINTREQUEST occurs. This can be either a pressed key or a software command, etc. The description of a basic logic gate, on the other hand, may consist of only one boolean equation. This is a very short and precise description.
The language VHDL covers the complete range of applications and can be used to model (digital) hardware in a general way.
