By Green Mountain Computing Systems
Welcome to our online VHDL tutorial! The VHDL tutorial has been separated into chapters and sections to provide easy access for second time visitors. However, the tutorial was designed to be presented in sequence and should be read as such. To follow the tutorial sequentially, simply follow the next section link at the end of each page.
Directory of Chapters
Welcome to our online VHDL tutorial! The VHDL tutorial has been separated into chapters and sections to provide easy access for second time visitors. However, the tutorial was designed to be presented in sequence and should be read as such. To follow the tutorial sequentially, simply follow the next section link at the end of each page.
Directory of Chapters
- An Introduction and Background
- Structural Descriptions
- Data Flow Descriptions
- Behavioral Descriptions
VHDL is an acronym which stands for VHSIC Hardware Description Language. VHSIC is yet another achronym which stands for Very High Speed Integrated Circuits. If you can remember that, then you're off to a good start. The language has been known to be somewhat complicated, as its title (as titles go). The acronym does have a purpose, though; it is supposed to capture the entire theme of the language, that is to describe hardware much the same way we use schematics.
VHDL can wear many hats. It is being used for documentation, verification, and synthesis of large digital designs. This is actually one of the key features of VHDL, since the same VHDL code can theoretically achieve all three of these goals, thus saving a lot of effort. In addition to being used for each of these purposes, VHDL can be used to take three different approaches to describing hardware. These three different approaches are the structural, data flow, and behavioral methods of hardware description. Most of the time a mixture of the three methods are employed. The following sections introduce you to the language by examining its use for each of these three methodologies. There are also certain guidelines that form an approach to using VHDL for synthesis, which is not addressed by this tutorial.
VHDL is a standard (VHDL-1076) developed by IEEE (Institute of Electrical and Electronics Engineers). The language has been through a few revisions, and you will come across this in the VHDL community. Currently, the most widely used version is the 1987 (std 1076-1987) version, sometimes referred to as VHDL'87, but also just VHDL. However, there is a newer revision of the language referred to as VHDL'93. VHDL'93 (adopted in 1994 of course) is fairly new and is still in the process of replacing VHDL'87.
