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Analog and Mixed-Signal Modeling Using the VHDL-AMS Language

What is VHDL-AMS

IEEE Std. 1076-1993: VHDL (VHSIC Hardware Description Language) supports the description and simulation of event-driven systems.

IEEE Std. 1076.1-1999: Extension to VHDL to support the description and simulation of analog and mixed-signal circuits and systems

IEEE Std. 1076.1-1999 together with IEEE Std. 1076-1993 is informally known as VHDL-AMS.

VHDL-AMS is a strict superset of IEEE Std. 1076-1993: Any model valid in VHDL 1076 is valid in VHDL-AMS and yields the same simulation results

Why is VHDL-AMS needed?
VHDL 1076 is suitable for modeling and simulating discrete systems. Designers want a uniform description language and Many of today’s designs include at least some continuous characteristics such as
System design
  • Mixed-signal electrical designs
  • Mixed electrical/non-electrical designs
  • Modeling design environment
Analog design
  • Analog behavioral modeling and simulation
Digital design
  • Detailed modeling (e.g. submicron effects)
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